1. Field of the Invention
The present invention relates to an encoder for converting parallel data to serial data, a decoder for converting serial data to parallel data, and a data transfer system for transferring serial data. More particularly, the invention relates to an encoder, a decoder, and a data transfer system that reduce the high-frequency components of data to be transferred by decreasing the changing points of serial data, thereby effectively suppressing EMI (Electro-Magnetic Interference).
2. Description of the Related Art
With data transfer systems for transferring serial data, it has been an important problem that how we effectively suppress “EMI”, i.e., an electromagnetic effect induced by radiation of electromagnetic wave. Electro-magnetic energy, which is a main cause of EMI, is generated by high-frequency components of data to be transferred.
In recent years, to cope with the demand of higher data transmission, the data transfer rate has been becoming higher. In this case, the duration applied to an individual bit of serial data (i.e., the pulse width of electric signal of serial data) is narrowed still more and as a result, the curve of the signal is sharpened at changing points where the values of the adjoining bits of the data change. This means that the high-frequency components of the signal or data increase, making the EMI-inducing problem more conspicuous.
To suppress the high-frequency components of the signal or data to be transferred as the cause of EMI, some countermeasures have been already developed and disclosed, where the changing points of serial data to be transferred are decreased.
FIG. 1 shows a functional block diagram of a prior-art data transfer system for transferring serial data, where the changing points of serial data to be transferred are decreased using look-up tables. The prior-art data transfer system of FIG. 1 may be referred as the “first prior-art data transfer system” below.
As shown in FIG. 1, the data transfer system comprises a data transmission circuit 210 and a data reception circuit 220. In this system, a discrimination bit is added to 8-bit data (bit 0 to bit 7) to be transferred, forming 9-bit data (bit 0′ to bit 8′). The 9-bit data thus formed is used as the “transfer unit” in the data transfer operation.
The data transmission circuit 210 comprises an encoder 211 and an output circuit 212. The encoder 211 has a look-up table 213 and a parallel-to-serial conversion circuit 214. In the look-up table 213, 9-bit data are stored in advance. The 9-bit data are generated in the following way. Specifically, 8-bit data to be transferred (i.e., original 8-bit data) are respectively modified In such a way as to decrease their changing points, thereby forming modified 8-bit data. Thereafter, a discrimination bit for showing the fact that the modification was applied to each of the modified 8-bit data thus formed, thereby forming the 9-bit data. The 9-bit data are then stored in the table 213.
By accessing the look-up table 213 using original 8-bit data (bit 0 to bit 7) as the address, the 9-bit data (bit 0′ to bit 8′) having the decreased changing points corresponding to the original 8-bit data is obtained. The 9-bit data thus obtained is converted to a serial code by the parallel-to-serial conversion circuit 214.
The output circuit 212, which comprises an output buffer and a control circuit for controlling the data transmission, outputs the serial code sent form the parallel-to-serial conversion circuit 214 to a transmission channel or line 230. As a countermeasure against EMI, a process for making differential-pair signal lines and/or a filtering process may be additionally carried out.
On the other hand, the data reception circuit 220 comprises an input circuit 221 and a decoder 222. The input circuit 221, which has an input buffer and a control circuit for controlling the data reception operation, receives the serial code transmitted by way of the transmission line 230. As a countermeasure against EMI, an inverse-filtering process and/or a process for making a single signal line may be additionally carried out.
In the look-up table 224 of the decoder 222, 8-bit data for returning the 9-bit data generated by the encoder 211 of the data transmission circuit 210 to the original 8-bit data based on the discrimination bit are stored in advance.
The serial code received by the input circuit 221 is converted to a 9-bit parallel data (bit 0′ to bit 8′) by the serial-to-parallel conversion circuit 223. By accessing the look-up table 224 using the 9-bit parallel data thus obtained as the address, the original 8-bit data (bit 0 to bit 7) is obtained.
The Japanese Non-Examined Patent Publication No. 2001-36590 published in 2001 discloses a serial data transmission system, which may be referred as the “second prior-art data transfer system” below.
The serial data transmission system of the Publication No. 2001-36590 has an object to suppress the high-frequency components of a signal or data to be transferred as the cause of EMI even if the data transfer rate is raised. In this system, a signal or data to be transferred is converted (Concretely, the bits of the signal or data to be transferred are permuted) by a conversion means in such a way as to decrease its changing points, thereby forming a converted data or signal. Thereafter, conversion data for showing how the signal or data to be transferred was converted by the conversion means is added to the converted data or signal Subsequently, the converted data or signal to which the conversion data was added is transmitted by a transmission means.
With the first prior-art data transfer system, however, the look-up tables 213 and 224 are provided in the data transmission circuit 210 and the data reception circuit 220, respectively. Therefore, there is an advantage that the degree of freedom for data conversion in the encoder 211 and the decoder 222 is high. However, these tables 213 and 224 necessitate large storage capacities, respectively. Therefore, there is a disadvantage that the circuit scale of the system is large and the fabrication cost thereof is high.
For example, a storage capacity of [9 (bits)×256(words)(=8 bits)] is required for the look-up table 213 of the data transmission circuit 210. A storage capacity of [8(bits)×512(words)(=9 bits)] is required for the look-up table 224 of the data reception circuit 220. If the changing points formed at the boundaries between the adjoining data to be transmitted are considered, a storage capacity of [9 (bits)×512(words)(=9 bits)] is required for the look-up table 213 of the data transmission circuit 210.
With the second prior-art data transfer system, the conversion of the signal or data to be transferred by the conversion means is permutation of the bits of the signal or data to be transferred, which is a complicated process. Therefore, there is a disadvantage that a heavy load is applied to the encoder and decoder.
Since the conversion data showing how the signal or data was converted is added to the converted data or signal, the bit length of the transfer unit is increased. Thus, if the conversion data is complicated, there is another disadvantage that the transfer frequency needs to be raised and as a result, effective EMI suppression may be prevented.
Moreover, due to the changing points of the conversion data themselves and those generated at the boundaries between the data to be transmitted and the conversion data, there is a possibility that the count of the changing points is increased compared with that before the conversion operation, if the conversion data added is particular one. In this case, the high-frequency components as the cause of EMI are unable to be suppressed, which is a still another disadvantage.